publicações selecionadas
- CGP-based Logic Flow: Optimizing Accuracy and Size of Approximate Circuits
- C2PAx: Complexity-Aware Constant Parameter Approximation for Energy-Efficient Tree-Based Machine Learning Accelerators
- Exploring partial distortion elimination techniques in the sum of absolute differences architecture for HEVC integer motion estimation
- A framework for designing power-efficient inference accelerators in tree-based learning applications
- A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers
- Exploring Absolute Differences Arithmetic Operators for Power- and Area-Efficient SAD Hardware Architectures
- Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding
- MAxPy: A Framework for Bridging Approximate Computing Circuits to its Applications
- Energy-Quality Scalable Design Space Exploration of Approximate FFT Hardware Architectures
- Compact CMOS-Compatible Majority Gate Using Body Biasing in FDSOI Technology
- The 4-2 Fused Adder-Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures